750 lines
18 KiB
C
750 lines
18 KiB
C
/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file stm32h7xx_it.c
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* @brief Interrupt Service Routines.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2023 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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#include "stm32h7xx_it.h"
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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#include "HW_config.h"
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#include "uart_fecbus_drv.h"
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#include "uart_fec_std_drv.h"
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#include "uart_lp_test_drv.h"
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#include "task.h"
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/* USER CODE END Includes */
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/* Private typedef -----------------------------------------------------------*/
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/* USER CODE BEGIN TD */
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/* USER CODE END TD */
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/* Private define ------------------------------------------------------------*/
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/* USER CODE BEGIN PD */
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/* USER CODE END PD */
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/* Private macro -------------------------------------------------------------*/
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/* USER CODE BEGIN PM */
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/* USER CODE END PM */
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/* Private variables ---------------------------------------------------------*/
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/* USER CODE BEGIN PV */
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/* USER CODE END PV */
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/* Private function prototypes -----------------------------------------------*/
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/* USER CODE BEGIN PFP */
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/* USER CODE END PFP */
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/* Private user code ---------------------------------------------------------*/
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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/* External variables --------------------------------------------------------*/
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extern HCD_HandleTypeDef hhcd_USB_OTG_FS;
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extern PCD_HandleTypeDef hpcd_USB_OTG_FS;
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extern FDCAN_HandleTypeDef hfdcan2;
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extern LTDC_HandleTypeDef hltdc;
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/* USER CODE BEGIN EV */
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/* USER CODE END EV */
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/******************************************************************************/
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/* Cortex Processor Interruption and Exception Handlers */
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/******************************************************************************/
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/**
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* @brief This function handles Non maskable interrupt.
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*/
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void NMI_Handler(void)
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{
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/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
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/* USER CODE END NonMaskableInt_IRQn 0 */
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/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
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while (1)
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{
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}
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/* USER CODE END NonMaskableInt_IRQn 1 */
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}
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/**
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* @brief This function handles Hard fault interrupt.
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*/
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void HardFault_Handler(void)
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{
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/* USER CODE BEGIN HardFault_IRQn 0 */
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/* USER CODE END HardFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_HardFault_IRQn 0 */
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/* USER CODE END W1_HardFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Memory management fault.
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*/
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void MemManage_Handler(void)
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{
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/* USER CODE BEGIN MemoryManagement_IRQn 0 */
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/* USER CODE END MemoryManagement_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
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/* USER CODE END W1_MemoryManagement_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Pre-fetch fault, memory access fault.
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*/
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void BusFault_Handler(void)
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{
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/* USER CODE BEGIN BusFault_IRQn 0 */
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/* USER CODE END BusFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_BusFault_IRQn 0 */
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/* USER CODE END W1_BusFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Undefined instruction or illegal state.
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*/
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void UsageFault_Handler(void)
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{
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/* USER CODE BEGIN UsageFault_IRQn 0 */
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/* USER CODE END UsageFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
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/* USER CODE END W1_UsageFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles System service call via SWI instruction.
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*/
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void SVC_Handler(void)
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{
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/* USER CODE BEGIN SVCall_IRQn 0 */
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/* USER CODE END SVCall_IRQn 0 */
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/* USER CODE BEGIN SVCall_IRQn 1 */
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/* USER CODE END SVCall_IRQn 1 */
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}
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/**
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* @brief This function handles Debug monitor.
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*/
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void DebugMon_Handler(void)
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{
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/* USER CODE BEGIN DebugMonitor_IRQn 0 */
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/* USER CODE END DebugMonitor_IRQn 0 */
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/* USER CODE BEGIN DebugMonitor_IRQn 1 */
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/* USER CODE END DebugMonitor_IRQn 1 */
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}
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/**
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* @brief This function handles Pendable request for system service.
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*/
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void PendSV_Handler(void)
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{
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/* USER CODE BEGIN PendSV_IRQn 0 */
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/* USER CODE END PendSV_IRQn 0 */
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/* USER CODE BEGIN PendSV_IRQn 1 */
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/* USER CODE END PendSV_IRQn 1 */
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}
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/**
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* @brief This function handles System tick timer.
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*/
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void SysTick_Handler(void)
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{
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/* USER CODE BEGIN SysTick_IRQn 0 */
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/* USER CODE END SysTick_IRQn 0 */
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HAL_IncTick();
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/* USER CODE BEGIN SysTick_IRQn 1 */
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my_sys_tick();
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/* USER CODE END SysTick_IRQn 1 */
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}
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/******************************************************************************/
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/* STM32H7xx Peripheral Interrupt Handlers */
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/* Add here the Interrupt Handlers for the used peripherals. */
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/* For the available peripheral interrupt handler names, */
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/* please refer to the startup file (startup_stm32h7xx.s). */
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/******************************************************************************/
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/**
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* @brief This function handles DMA1 stream3 global interrupt.
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*/
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void DMA1_Stream3_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Stream3_IRQn 0 */
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/* USER CODE END DMA1_Stream3_IRQn 0 */
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/* USER CODE BEGIN DMA1_Stream3_IRQn 1 */
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/* USER CODE END DMA1_Stream3_IRQn 1 */
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}
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/**
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* @brief This function handles FDCAN2 interrupt 0.
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*/
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void FDCAN2_IT0_IRQHandler(void)
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{
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/* USER CODE BEGIN FDCAN2_IT0_IRQn 0 */
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/* USER CODE END FDCAN2_IT0_IRQn 0 */
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HAL_FDCAN_IRQHandler(&hfdcan2);
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/* USER CODE BEGIN FDCAN2_IT0_IRQn 1 */
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/* USER CODE END FDCAN2_IT0_IRQn 1 */
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}
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/**
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* @brief This function handles USART1 global interrupt.
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*/
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void USART1_IRQHandler(void)
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{
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/* USER CODE BEGIN USART1_IRQn 0 */
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unsigned short cc;
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uart_info_8bit_struct * p_uart_info;
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p_uart_info = &uart_info_8bit[1];
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/* USER CODE END USART1_IRQn 0 */
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/* USER CODE BEGIN USART1_IRQn 1 */
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if(LL_USART_IsActiveFlag_RXNE(USART1))
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{
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cc = LL_USART_ReceiveData8(USART1);
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if(p_uart_info->rx_index < UART_RX_BUF_MAX)
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{
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p_uart_info->rx_buf[p_uart_info->rx_index] = cc;
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p_uart_info->rx_index++;
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}
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}
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if(LL_USART_IsActiveFlag_IDLE(USART1))
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{
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LL_USART_ClearFlag_IDLE(USART1);
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if(p_uart_info->rx_index)
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{
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p_uart_info->rx_len = p_uart_info->rx_index;
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p_uart_info->rx_index = 0;
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p_uart_info->rx_complete = 1;
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}
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}
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//--------------------------------------------------------------------------------------------------
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if(LL_USART_IsActiveFlag_TC(USART1))
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{
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LL_USART_ClearFlag_TC(USART1);
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if(p_uart_info->tx_index >= p_uart_info->tx_len)
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{
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LL_USART_DisableIT_TC(USART1);
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p_uart_info->tx_complete = 1;
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}
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}
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if(LL_USART_IsActiveFlag_TXFE(USART1))
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{
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if(p_uart_info->tx_index >= p_uart_info->tx_len)
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{
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LL_USART_DisableIT_TXFE(USART1);
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}
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else
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{
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LL_USART_TransmitData8(USART1, p_uart_info->tx_buf[p_uart_info->tx_index]);
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p_uart_info->tx_index++;
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}
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}
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//---------------------------------------------------------------------------
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LL_USART_ClearFlag_ORE(USART1);
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/* USER CODE END USART1_IRQn 1 */
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}
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/**
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* @brief This function handles USART2 global interrupt.
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*/
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void USART2_IRQHandler(void)
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{
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/* USER CODE BEGIN USART2_IRQn 0 */
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unsigned short cc;
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uart_info_8bit_struct * p_uart_info;
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p_uart_info = &uart_info_8bit[2];
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/* USER CODE END USART2_IRQn 0 */
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/* USER CODE BEGIN USART2_IRQn 1 */
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fecbus_rx_irq();
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/*
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if(LL_USART_IsActiveFlag_RXNE(USART2))
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{
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cc = LL_USART_ReceiveData8(USART2);
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if(p_uart_info->rx_index < UART_RX_BUF_MAX)
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{
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p_uart_info->rx_buf[p_uart_info->rx_index] = cc;
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p_uart_info->rx_index++;
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}
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}
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if(LL_USART_IsActiveFlag_IDLE(USART2))
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{
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LL_USART_ClearFlag_IDLE(USART2);
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if(p_uart_info->rx_index)
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{
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p_uart_info->rx_len = p_uart_info->rx_index;
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p_uart_info->rx_index = 0;
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p_uart_info->rx_complete = 1;
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}
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}
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*/
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//--------------------------------------------------------------------------------------------------
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if(LL_USART_IsActiveFlag_TC(USART2))
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{
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LL_USART_ClearFlag_TC(USART2);
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if(p_uart_info->tx_index >= p_uart_info->tx_len)
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{
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LL_USART_DisableIT_TC(USART2);
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p_uart_info->tx_complete = 1;
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}
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}
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if(LL_USART_IsActiveFlag_TXFE(USART2))
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{
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if(p_uart_info->tx_index >= p_uart_info->tx_len)
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{
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LL_USART_DisableIT_TXFE(USART2);
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}
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else
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{
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LL_USART_TransmitData8(USART2, p_uart_info->tx_buf[p_uart_info->tx_index]);
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p_uart_info->tx_index++;
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}
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}
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//---------------------------------------------------------------------------
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LL_USART_ClearFlag_ORE(USART2);
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/* USER CODE END USART2_IRQn 1 */
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}
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/**
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* @brief This function handles USART3 global interrupt.
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*/
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void USART3_IRQHandler(void)
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{
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/* USER CODE BEGIN USART3_IRQn 0 */
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unsigned short cc;
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uart_info_8bit_struct * p_uart_info;
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p_uart_info = &uart_info_8bit[3];
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/* USER CODE END USART3_IRQn 0 */
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/* USER CODE BEGIN USART3_IRQn 1 */
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if(LL_USART_IsActiveFlag_RXNE(USART3))
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{
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cc = LL_USART_ReceiveData8(USART3);
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if(p_uart_info->rx_index < UART_RX_BUF_MAX)
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{
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p_uart_info->rx_buf[p_uart_info->rx_index] = cc;
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p_uart_info->rx_index++;
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}
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}
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if(LL_USART_IsActiveFlag_IDLE(USART3))
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{
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LL_USART_ClearFlag_IDLE(USART3);
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if(p_uart_info->rx_index)
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{
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p_uart_info->rx_len = p_uart_info->rx_index;
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p_uart_info->rx_index = 0;
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p_uart_info->rx_complete = 1;
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}
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}
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//--------------------------------------------------------------------------------------------------
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if(LL_USART_IsActiveFlag_TC(USART3))
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{
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LL_USART_ClearFlag_TC(USART3);
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if(p_uart_info->tx_index >= p_uart_info->tx_len)
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{
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LL_USART_DisableIT_TC(USART3);
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p_uart_info->tx_complete = 1;
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}
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}
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if(LL_USART_IsActiveFlag_TXFE(USART3))
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{
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if(p_uart_info->tx_index >= p_uart_info->tx_len)
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{
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LL_USART_DisableIT_TXFE(USART3);
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}
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else
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{
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LL_USART_TransmitData8(USART3, p_uart_info->tx_buf[p_uart_info->tx_index]);
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p_uart_info->tx_index++;
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}
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}
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//---------------------------------------------------------------------------
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LL_USART_ClearFlag_ORE(USART3);
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/* USER CODE END USART3_IRQn 1 */
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}
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/**
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* @brief This function handles UART4 global interrupt.
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*/
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void UART4_IRQHandler(void)
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{
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/* USER CODE BEGIN UART4_IRQn 0 */
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unsigned short cc;
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uart_info_8bit_struct * p_uart_info;
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p_uart_info = &uart_info_8bit[4];
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/* USER CODE END UART4_IRQn 0 */
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/* USER CODE BEGIN UART4_IRQn 1 */
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fec_std_rx_irq();
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//--------------------------------------------------------------------------------------------------
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if(LL_USART_IsActiveFlag_TC(UART4))
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{
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LL_USART_ClearFlag_TC(UART4);
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if(p_uart_info->tx_index >= p_uart_info->tx_len)
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{
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LL_USART_DisableIT_TC(UART4);
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p_uart_info->tx_complete = 1;
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}
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}
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if(LL_USART_IsActiveFlag_TXFE(UART4))
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{
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if(p_uart_info->tx_index >= p_uart_info->tx_len)
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{
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LL_USART_DisableIT_TXFE(UART4);
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}
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else
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{
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LL_USART_TransmitData8(UART4, p_uart_info->tx_buf[p_uart_info->tx_index]);
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p_uart_info->tx_index++;
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}
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}
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//---------------------------------------------------------------------------
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LL_USART_ClearFlag_ORE(UART4);
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/* USER CODE END UART4_IRQn 1 */
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}
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/**
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* @brief This function handles UART5 global interrupt.
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*/
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void UART5_IRQHandler(void)
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{
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/* USER CODE BEGIN UART5_IRQn 0 */
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unsigned short cc;
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uart_info_8bit_struct * p_uart_info;
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p_uart_info = &uart_info_8bit[5];
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/* USER CODE END UART5_IRQn 0 */
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/* USER CODE BEGIN UART5_IRQn 1 */
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if(LL_USART_IsActiveFlag_RXNE(UART5))
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{
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cc = LL_USART_ReceiveData8(UART5);
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if(p_uart_info->rx_index < UART_RX_BUF_MAX)
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{
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p_uart_info->rx_buf[p_uart_info->rx_index] = cc;
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p_uart_info->rx_index++;
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}
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}
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if(LL_USART_IsActiveFlag_IDLE(UART5))
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{
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LL_USART_ClearFlag_IDLE(UART5);
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if(p_uart_info->rx_index)
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{
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p_uart_info->rx_len = p_uart_info->rx_index;
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p_uart_info->rx_index = 0;
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p_uart_info->rx_complete = 1;
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}
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}
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//--------------------------------------------------------------------------------------------------
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if(LL_USART_IsActiveFlag_TC(UART5))
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{
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LL_USART_ClearFlag_TC(UART5);
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if(p_uart_info->tx_index >= p_uart_info->tx_len)
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{
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LL_USART_DisableIT_TC(UART5);
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p_uart_info->tx_complete = 1;
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}
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}
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if(LL_USART_IsActiveFlag_TXFE(UART5))
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{
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if(p_uart_info->tx_index >= p_uart_info->tx_len)
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{
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LL_USART_DisableIT_TXFE(UART5);
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}
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else
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{
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LL_USART_TransmitData8(UART5, p_uart_info->tx_buf[p_uart_info->tx_index]);
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p_uart_info->tx_index++;
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}
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}
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//---------------------------------------------------------------------------
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LL_USART_ClearFlag_ORE(UART5);
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/* USER CODE END UART5_IRQn 1 */
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}
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/**
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* @brief This function handles TIM7 global interrupt.
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*/
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void TIM7_IRQHandler(void)
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{
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/* USER CODE BEGIN TIM7_IRQn 0 */
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/* USER CODE END TIM7_IRQn 0 */
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/* USER CODE BEGIN TIM7_IRQn 1 */
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if(LL_TIM_IsActiveFlag_UPDATE(TIM7))
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{
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LL_TIM_ClearFlag_UPDATE(TIM7);
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//GPIOC->ODR^=0x20;
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}
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/* USER CODE END TIM7_IRQn 1 */
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}
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/**
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* @brief This function handles USART6 global interrupt.
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*/
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void USART6_IRQHandler(void)
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{
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/* USER CODE BEGIN USART6_IRQn 0 */
|
|
unsigned short cc;
|
|
uart_info_8bit_struct * p_uart_info;
|
|
p_uart_info = &uart_info_8bit[6];
|
|
/* USER CODE END USART6_IRQn 0 */
|
|
/* USER CODE BEGIN USART6_IRQn 1 */
|
|
if(LL_USART_IsActiveFlag_RXNE(USART6))
|
|
{
|
|
cc = LL_USART_ReceiveData8(USART6);
|
|
|
|
p_uart_info->rx_index = 0;
|
|
p_uart_info->rx_complete = 1;
|
|
p_uart_info->rx_buf[p_uart_info->rx_index] = cc;
|
|
p_uart_info->rx_index++;
|
|
p_uart_info->rx_len = p_uart_info->rx_index;
|
|
p_uart_info->rx_index = 0;
|
|
}
|
|
//--------------------------------------------------------------------------------------------------
|
|
if(LL_USART_IsActiveFlag_TC(USART6))
|
|
{
|
|
LL_USART_ClearFlag_TC(USART6);
|
|
if(p_uart_info->tx_index >= p_uart_info->tx_len)
|
|
{
|
|
LL_USART_DisableIT_TC(USART6);
|
|
p_uart_info->tx_complete = 1;
|
|
}
|
|
}
|
|
|
|
if(LL_USART_IsActiveFlag_TXFE(USART6))
|
|
{
|
|
if(p_uart_info->tx_index >= p_uart_info->tx_len)
|
|
{
|
|
LL_USART_DisableIT_TXFE(USART6);
|
|
}
|
|
else
|
|
{
|
|
LL_USART_TransmitData8(USART6, p_uart_info->tx_buf[p_uart_info->tx_index]);
|
|
p_uart_info->tx_index++;
|
|
}
|
|
}
|
|
//---------------------------------------------------------------------------
|
|
LL_USART_ClearFlag_ORE(USART6);
|
|
/* USER CODE END USART6_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles UART7 global interrupt.
|
|
*/
|
|
void UART7_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN UART7_IRQn 0 */
|
|
unsigned short cc;
|
|
uart_info_8bit_struct * p_uart_info;
|
|
p_uart_info = &uart_info_8bit[7];
|
|
/* USER CODE END UART7_IRQn 0 */
|
|
/* USER CODE BEGIN UART7_IRQn 1 */
|
|
/*
|
|
if(LL_USART_IsActiveFlag_RXNE(UART7))
|
|
{
|
|
cc = LL_USART_ReceiveData8(UART7);
|
|
|
|
if(cc == UART_HEAD)
|
|
{
|
|
p_uart_info->rx_index = 0;
|
|
}
|
|
else if(cc == UART_END)
|
|
{
|
|
p_uart_info->rx_len = p_uart_info->rx_index;
|
|
p_uart_info->rx_complete = 1;
|
|
}
|
|
else
|
|
{
|
|
if(p_uart_info->rx_index < UART_RX_BUF_MAX)
|
|
{
|
|
p_uart_info->rx_buf[p_uart_info->rx_index] = cc;
|
|
p_uart_info->rx_index++;
|
|
}
|
|
}
|
|
}
|
|
|
|
if(LL_USART_IsActiveFlag_IDLE(UART7))
|
|
{
|
|
LL_USART_ClearFlag_IDLE(UART7);
|
|
}
|
|
*/
|
|
|
|
if(LL_USART_IsActiveFlag_RXNE(UART7))
|
|
{
|
|
cc = LL_USART_ReceiveData8(UART7);
|
|
|
|
if(p_uart_info->rx_index < UART_RX_BUF_MAX)
|
|
{
|
|
p_uart_info->rx_buf[p_uart_info->rx_index] = cc;
|
|
p_uart_info->rx_index++;
|
|
}
|
|
}
|
|
|
|
if(LL_USART_IsActiveFlag_IDLE(UART7))
|
|
{
|
|
LL_USART_ClearFlag_IDLE(UART7);
|
|
if(p_uart_info->rx_index)
|
|
{
|
|
p_uart_info->rx_len = p_uart_info->rx_index;
|
|
p_uart_info->rx_index = 0;
|
|
p_uart_info->rx_complete = 1;
|
|
}
|
|
}
|
|
//--------------------------------------------------------------------------------------------------
|
|
if(LL_USART_IsActiveFlag_TC(UART7))
|
|
{
|
|
LL_USART_ClearFlag_TC(UART7);
|
|
if(p_uart_info->tx_index >= p_uart_info->tx_len)
|
|
{
|
|
LL_USART_DisableIT_TC(UART7);
|
|
p_uart_info->tx_complete = 1;
|
|
}
|
|
}
|
|
|
|
if(LL_USART_IsActiveFlag_TXFE(UART7))
|
|
{
|
|
if(p_uart_info->tx_index >= p_uart_info->tx_len)
|
|
{
|
|
LL_USART_DisableIT_TXFE(UART7);
|
|
}
|
|
else
|
|
{
|
|
LL_USART_TransmitData8(UART7, p_uart_info->tx_buf[p_uart_info->tx_index]);
|
|
p_uart_info->tx_index++;
|
|
}
|
|
}
|
|
//---------------------------------------------------------------------------
|
|
LL_USART_ClearFlag_ORE(UART7);
|
|
/* USER CODE END UART7_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles LTDC global interrupt.
|
|
*/
|
|
void LTDC_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN LTDC_IRQn 0 */
|
|
|
|
/* USER CODE END LTDC_IRQn 0 */
|
|
HAL_LTDC_IRQHandler(&hltdc);
|
|
/* USER CODE BEGIN LTDC_IRQn 1 */
|
|
|
|
/* USER CODE END LTDC_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles USB On The Go FS global interrupt.
|
|
*/
|
|
void OTG_FS_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN OTG_FS_IRQn 0 */
|
|
|
|
/* USER CODE END OTG_FS_IRQn 0 */
|
|
HAL_HCD_IRQHandler(&hhcd_USB_OTG_FS);
|
|
/* USER CODE BEGIN OTG_FS_IRQn 1 */
|
|
HAL_PCD_IRQHandler(&hpcd_USB_OTG_FS);
|
|
/* USER CODE END OTG_FS_IRQn 1 */
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles LPUART1 global interrupt.
|
|
*/
|
|
void LPUART1_IRQHandler(void)
|
|
{
|
|
/* USER CODE BEGIN LPUART1_IRQn 0 */
|
|
unsigned short cc;
|
|
uart_info_8bit_struct * p_uart_info;
|
|
p_uart_info = &uart_info_8bit[0];
|
|
/* USER CODE END LPUART1_IRQn 0 */
|
|
/* USER CODE BEGIN LPUART1_IRQn 1 */
|
|
test_rx_irq();
|
|
|
|
//--------------------------------------------------------------------------------------------------
|
|
if(LL_USART_IsActiveFlag_TC(LPUART1))
|
|
{
|
|
LL_USART_ClearFlag_TC(LPUART1);
|
|
if(p_uart_info->tx_index >= p_uart_info->tx_len)
|
|
{
|
|
LL_USART_DisableIT_TC(LPUART1);
|
|
p_uart_info->tx_complete = 1;
|
|
}
|
|
}
|
|
|
|
if(LL_USART_IsActiveFlag_TXFE(LPUART1))
|
|
{
|
|
if(p_uart_info->tx_index >= p_uart_info->tx_len)
|
|
{
|
|
LL_USART_DisableIT_TXFE(LPUART1);
|
|
}
|
|
else
|
|
{
|
|
LL_USART_TransmitData8(LPUART1, p_uart_info->tx_buf[p_uart_info->tx_index]);
|
|
p_uart_info->tx_index++;
|
|
}
|
|
}
|
|
//---------------------------------------------------------------------------
|
|
LL_USART_ClearFlag_ORE(LPUART1);
|
|
/* USER CODE END LPUART1_IRQn 1 */
|
|
}
|
|
|
|
/* USER CODE BEGIN 1 */
|
|
|
|
/* USER CODE END 1 */
|