/* USER CODE BEGIN Header */
/**
  ******************************************************************************
  * @file    stm32h7xx_it.c
  * @brief   Interrupt Service Routines.
  ******************************************************************************
  * @attention
  *
  * Copyright (c) 2023 STMicroelectronics.
  * All rights reserved.
  *
  * This software is licensed under terms that can be found in the LICENSE file
  * in the root directory of this software component.
  * If no LICENSE file comes with this software, it is provided AS-IS.
  *
  ******************************************************************************
  */
/* USER CODE END Header */

/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "stm32h7xx_it.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include "HW_config.h"
#include "uart_fecbus_drv.h"
#include "uart_fec_std_drv.h"
#include "uart_lp_test_drv.h"
#include "task.h"
/* USER CODE END Includes */

/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */

/* USER CODE END TD */

/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */

/* USER CODE END PD */

/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */

/* USER CODE END PM */

/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */

/* USER CODE END PV */

/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */

/* USER CODE END PFP */

/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */

/* USER CODE END 0 */

/* External variables --------------------------------------------------------*/
extern HCD_HandleTypeDef hhcd_USB_OTG_FS;
extern PCD_HandleTypeDef hpcd_USB_OTG_FS;
extern FDCAN_HandleTypeDef hfdcan2;
extern LTDC_HandleTypeDef hltdc;
/* USER CODE BEGIN EV */

/* USER CODE END EV */

/******************************************************************************/
/*           Cortex Processor Interruption and Exception Handlers          */
/******************************************************************************/
/**
  * @brief This function handles Non maskable interrupt.
  */
void NMI_Handler(void)
{
  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */

  /* USER CODE END NonMaskableInt_IRQn 0 */
  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
  while (1)
  {
  }
  /* USER CODE END NonMaskableInt_IRQn 1 */
}

/**
  * @brief This function handles Hard fault interrupt.
  */
void HardFault_Handler(void)
{
  /* USER CODE BEGIN HardFault_IRQn 0 */

  /* USER CODE END HardFault_IRQn 0 */
  while (1)
  {
    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
    /* USER CODE END W1_HardFault_IRQn 0 */
  }
}

/**
  * @brief This function handles Memory management fault.
  */
void MemManage_Handler(void)
{
  /* USER CODE BEGIN MemoryManagement_IRQn 0 */

  /* USER CODE END MemoryManagement_IRQn 0 */
  while (1)
  {
    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
    /* USER CODE END W1_MemoryManagement_IRQn 0 */
  }
}

/**
  * @brief This function handles Pre-fetch fault, memory access fault.
  */
void BusFault_Handler(void)
{
  /* USER CODE BEGIN BusFault_IRQn 0 */

  /* USER CODE END BusFault_IRQn 0 */
  while (1)
  {
    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
    /* USER CODE END W1_BusFault_IRQn 0 */
  }
}

/**
  * @brief This function handles Undefined instruction or illegal state.
  */
void UsageFault_Handler(void)
{
  /* USER CODE BEGIN UsageFault_IRQn 0 */

  /* USER CODE END UsageFault_IRQn 0 */
  while (1)
  {
    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
    /* USER CODE END W1_UsageFault_IRQn 0 */
  }
}

/**
  * @brief This function handles System service call via SWI instruction.
  */
void SVC_Handler(void)
{
  /* USER CODE BEGIN SVCall_IRQn 0 */

  /* USER CODE END SVCall_IRQn 0 */
  /* USER CODE BEGIN SVCall_IRQn 1 */

  /* USER CODE END SVCall_IRQn 1 */
}

/**
  * @brief This function handles Debug monitor.
  */
void DebugMon_Handler(void)
{
  /* USER CODE BEGIN DebugMonitor_IRQn 0 */

  /* USER CODE END DebugMonitor_IRQn 0 */
  /* USER CODE BEGIN DebugMonitor_IRQn 1 */

  /* USER CODE END DebugMonitor_IRQn 1 */
}

/**
  * @brief This function handles Pendable request for system service.
  */
void PendSV_Handler(void)
{
  /* USER CODE BEGIN PendSV_IRQn 0 */

  /* USER CODE END PendSV_IRQn 0 */
  /* USER CODE BEGIN PendSV_IRQn 1 */

  /* USER CODE END PendSV_IRQn 1 */
}

/**
  * @brief This function handles System tick timer.
  */
void SysTick_Handler(void)
{
  /* USER CODE BEGIN SysTick_IRQn 0 */

  /* USER CODE END SysTick_IRQn 0 */
  HAL_IncTick();
  /* USER CODE BEGIN SysTick_IRQn 1 */
	my_sys_tick();
  /* USER CODE END SysTick_IRQn 1 */
}

/******************************************************************************/
/* STM32H7xx Peripheral Interrupt Handlers                                    */
/* Add here the Interrupt Handlers for the used peripherals.                  */
/* For the available peripheral interrupt handler names,                      */
/* please refer to the startup file (startup_stm32h7xx.s).                    */
/******************************************************************************/

/**
  * @brief This function handles DMA1 stream3 global interrupt.
  */
void DMA1_Stream3_IRQHandler(void)
{
  /* USER CODE BEGIN DMA1_Stream3_IRQn 0 */

  /* USER CODE END DMA1_Stream3_IRQn 0 */

  /* USER CODE BEGIN DMA1_Stream3_IRQn 1 */

  /* USER CODE END DMA1_Stream3_IRQn 1 */
}

/**
  * @brief This function handles FDCAN2 interrupt 0.
  */
void FDCAN2_IT0_IRQHandler(void)
{
  /* USER CODE BEGIN FDCAN2_IT0_IRQn 0 */

  /* USER CODE END FDCAN2_IT0_IRQn 0 */
  HAL_FDCAN_IRQHandler(&hfdcan2);
  /* USER CODE BEGIN FDCAN2_IT0_IRQn 1 */

  /* USER CODE END FDCAN2_IT0_IRQn 1 */
}

/**
  * @brief This function handles USART1 global interrupt.
  */
void USART1_IRQHandler(void)
{
  /* USER CODE BEGIN USART1_IRQn 0 */
	unsigned short cc;
	uart_info_8bit_struct * p_uart_info;
	p_uart_info = &uart_info_8bit[1];
  /* USER CODE END USART1_IRQn 0 */
  /* USER CODE BEGIN USART1_IRQn 1 */
	if(LL_USART_IsActiveFlag_RXNE(USART1))
	{
		cc = LL_USART_ReceiveData8(USART1);
		
		if(p_uart_info->rx_index < UART_RX_BUF_MAX)
		{
			p_uart_info->rx_buf[p_uart_info->rx_index] = cc;
			p_uart_info->rx_index++;
		}
	}
	
	if(LL_USART_IsActiveFlag_IDLE(USART1))
	{
		LL_USART_ClearFlag_IDLE(USART1);
		if(p_uart_info->rx_index)
		{
			p_uart_info->rx_len = p_uart_info->rx_index;
			p_uart_info->rx_index = 0;
			p_uart_info->rx_complete = 1;
		}
	}
	//--------------------------------------------------------------------------------------------------
	if(LL_USART_IsActiveFlag_TC(USART1))
	{
		LL_USART_ClearFlag_TC(USART1);
		if(p_uart_info->tx_index >= p_uart_info->tx_len)
		{
			LL_USART_DisableIT_TC(USART1);
			p_uart_info->tx_complete = 1;
		}
	}
	
	if(LL_USART_IsActiveFlag_TXFE(USART1))
	{
		if(p_uart_info->tx_index >= p_uart_info->tx_len)
		{
			LL_USART_DisableIT_TXFE(USART1);
		}
		else
		{
			LL_USART_TransmitData8(USART1, p_uart_info->tx_buf[p_uart_info->tx_index]);
			p_uart_info->tx_index++;
		}
	}
	//---------------------------------------------------------------------------
	LL_USART_ClearFlag_ORE(USART1);
  /* USER CODE END USART1_IRQn 1 */
}

/**
  * @brief This function handles USART2 global interrupt.
  */
void USART2_IRQHandler(void)
{
  /* USER CODE BEGIN USART2_IRQn 0 */
	unsigned short cc;
	uart_info_8bit_struct * p_uart_info;
	p_uart_info = &uart_info_8bit[2];
  /* USER CODE END USART2_IRQn 0 */
  /* USER CODE BEGIN USART2_IRQn 1 */
	fecbus_rx_irq();
	/*
	if(LL_USART_IsActiveFlag_RXNE(USART2))
	{
		cc = LL_USART_ReceiveData8(USART2);
		
		if(p_uart_info->rx_index < UART_RX_BUF_MAX)
		{
			p_uart_info->rx_buf[p_uart_info->rx_index] = cc;
			p_uart_info->rx_index++;
		}
	}
	
	if(LL_USART_IsActiveFlag_IDLE(USART2))
	{
		LL_USART_ClearFlag_IDLE(USART2);
		if(p_uart_info->rx_index)
		{
			p_uart_info->rx_len = p_uart_info->rx_index;
			p_uart_info->rx_index = 0;
			p_uart_info->rx_complete = 1;
		}
	}
	*/
	//--------------------------------------------------------------------------------------------------
	if(LL_USART_IsActiveFlag_TC(USART2))
	{
		LL_USART_ClearFlag_TC(USART2);
		if(p_uart_info->tx_index >= p_uart_info->tx_len)
		{
			LL_USART_DisableIT_TC(USART2);
			p_uart_info->tx_complete = 1;
		}
	}
	
	if(LL_USART_IsActiveFlag_TXFE(USART2))
	{
		if(p_uart_info->tx_index >= p_uart_info->tx_len)
		{
			LL_USART_DisableIT_TXFE(USART2);
		}
		else
		{
			LL_USART_TransmitData8(USART2, p_uart_info->tx_buf[p_uart_info->tx_index]);
			p_uart_info->tx_index++;
		}
	}
	//---------------------------------------------------------------------------
	LL_USART_ClearFlag_ORE(USART2);
  /* USER CODE END USART2_IRQn 1 */
}

/**
  * @brief This function handles USART3 global interrupt.
  */
void USART3_IRQHandler(void)
{
  /* USER CODE BEGIN USART3_IRQn 0 */
	unsigned short cc;
	uart_info_8bit_struct * p_uart_info;
	p_uart_info = &uart_info_8bit[3];
  /* USER CODE END USART3_IRQn 0 */
  /* USER CODE BEGIN USART3_IRQn 1 */
	if(LL_USART_IsActiveFlag_RXNE(USART3))
	{
		cc = LL_USART_ReceiveData8(USART3);
		
		if(p_uart_info->rx_index < UART_RX_BUF_MAX)
		{
			p_uart_info->rx_buf[p_uart_info->rx_index] = cc;
			p_uart_info->rx_index++;
		}
	}
	
	if(LL_USART_IsActiveFlag_IDLE(USART3))
	{
		LL_USART_ClearFlag_IDLE(USART3);
		if(p_uart_info->rx_index)
		{
			p_uart_info->rx_len = p_uart_info->rx_index;
			p_uart_info->rx_index = 0;
			p_uart_info->rx_complete = 1;
		}
	}
	//--------------------------------------------------------------------------------------------------
	if(LL_USART_IsActiveFlag_TC(USART3))
	{
		LL_USART_ClearFlag_TC(USART3);
		if(p_uart_info->tx_index >= p_uart_info->tx_len)
		{
			LL_USART_DisableIT_TC(USART3);
			p_uart_info->tx_complete = 1;
		}
	}
	
	if(LL_USART_IsActiveFlag_TXFE(USART3))
	{
		if(p_uart_info->tx_index >= p_uart_info->tx_len)
		{
			LL_USART_DisableIT_TXFE(USART3);
		}
		else
		{
			LL_USART_TransmitData8(USART3, p_uart_info->tx_buf[p_uart_info->tx_index]);
			p_uart_info->tx_index++;
		}
	}
	//---------------------------------------------------------------------------
	LL_USART_ClearFlag_ORE(USART3);
  /* USER CODE END USART3_IRQn 1 */
}

/**
  * @brief This function handles UART4 global interrupt.
  */
void UART4_IRQHandler(void)
{
  /* USER CODE BEGIN UART4_IRQn 0 */
	unsigned short cc;
	uart_info_8bit_struct * p_uart_info;
	p_uart_info = &uart_info_8bit[4];
  /* USER CODE END UART4_IRQn 0 */
  /* USER CODE BEGIN UART4_IRQn 1 */
	fec_std_rx_irq();
	
	//--------------------------------------------------------------------------------------------------
	if(LL_USART_IsActiveFlag_TC(UART4))
	{
		LL_USART_ClearFlag_TC(UART4);
		if(p_uart_info->tx_index >= p_uart_info->tx_len)
		{
			LL_USART_DisableIT_TC(UART4);
			p_uart_info->tx_complete = 1;
		}
	}
	
	if(LL_USART_IsActiveFlag_TXFE(UART4))
	{
		if(p_uart_info->tx_index >= p_uart_info->tx_len)
		{
			LL_USART_DisableIT_TXFE(UART4);
		}
		else
		{
			LL_USART_TransmitData8(UART4, p_uart_info->tx_buf[p_uart_info->tx_index]);
			p_uart_info->tx_index++;
		}
	}
	//---------------------------------------------------------------------------
	LL_USART_ClearFlag_ORE(UART4);
  /* USER CODE END UART4_IRQn 1 */
}

/**
  * @brief This function handles UART5 global interrupt.
  */
void UART5_IRQHandler(void)
{
  /* USER CODE BEGIN UART5_IRQn 0 */
	unsigned short cc;
	uart_info_8bit_struct * p_uart_info;
	p_uart_info = &uart_info_8bit[5];
  /* USER CODE END UART5_IRQn 0 */
  /* USER CODE BEGIN UART5_IRQn 1 */
	if(LL_USART_IsActiveFlag_RXNE(UART5))
	{
		cc = LL_USART_ReceiveData8(UART5);
		
		if(p_uart_info->rx_index < UART_RX_BUF_MAX)
		{
			p_uart_info->rx_buf[p_uart_info->rx_index] = cc;
			p_uart_info->rx_index++;
		}
	}
	
	if(LL_USART_IsActiveFlag_IDLE(UART5))
	{
		LL_USART_ClearFlag_IDLE(UART5);
		if(p_uart_info->rx_index)
		{
			p_uart_info->rx_len = p_uart_info->rx_index;
			p_uart_info->rx_index = 0;
			p_uart_info->rx_complete = 1;
		}
	}
	//--------------------------------------------------------------------------------------------------
	if(LL_USART_IsActiveFlag_TC(UART5))
	{
		LL_USART_ClearFlag_TC(UART5);
		if(p_uart_info->tx_index >= p_uart_info->tx_len)
		{
			LL_USART_DisableIT_TC(UART5);
			p_uart_info->tx_complete = 1;
		}
	}
	
	if(LL_USART_IsActiveFlag_TXFE(UART5))
	{
		if(p_uart_info->tx_index >= p_uart_info->tx_len)
		{
			LL_USART_DisableIT_TXFE(UART5);
		}
		else
		{
			LL_USART_TransmitData8(UART5, p_uart_info->tx_buf[p_uart_info->tx_index]);
			p_uart_info->tx_index++;
		}
	}
	//---------------------------------------------------------------------------
	LL_USART_ClearFlag_ORE(UART5);
  /* USER CODE END UART5_IRQn 1 */
}

/**
  * @brief This function handles TIM7 global interrupt.
  */
void TIM7_IRQHandler(void)
{
  /* USER CODE BEGIN TIM7_IRQn 0 */

  /* USER CODE END TIM7_IRQn 0 */
  /* USER CODE BEGIN TIM7_IRQn 1 */
	if(LL_TIM_IsActiveFlag_UPDATE(TIM7))  
	{
		LL_TIM_ClearFlag_UPDATE(TIM7);
		//GPIOC->ODR^=0x20;
	}
  /* USER CODE END TIM7_IRQn 1 */
}

/**
  * @brief This function handles USART6 global interrupt.
  */
void USART6_IRQHandler(void)
{
  /* USER CODE BEGIN USART6_IRQn 0 */
	unsigned short cc;
	uart_info_8bit_struct * p_uart_info;
	p_uart_info = &uart_info_8bit[6];
  /* USER CODE END USART6_IRQn 0 */
  /* USER CODE BEGIN USART6_IRQn 1 */
	if(LL_USART_IsActiveFlag_RXNE(USART6))
	{
		cc = LL_USART_ReceiveData8(USART6);
		
		p_uart_info->rx_index = 0;
		p_uart_info->rx_complete = 1;
		p_uart_info->rx_buf[p_uart_info->rx_index] = cc;
		p_uart_info->rx_index++;
		p_uart_info->rx_len = p_uart_info->rx_index;
		p_uart_info->rx_index = 0;
	}
	//--------------------------------------------------------------------------------------------------
	if(LL_USART_IsActiveFlag_TC(USART6))
	{
		LL_USART_ClearFlag_TC(USART6);
		if(p_uart_info->tx_index >= p_uart_info->tx_len)
		{
			LL_USART_DisableIT_TC(USART6);
			p_uart_info->tx_complete = 1;
		}
	}
	
	if(LL_USART_IsActiveFlag_TXFE(USART6))
	{
		if(p_uart_info->tx_index >= p_uart_info->tx_len)
		{
			LL_USART_DisableIT_TXFE(USART6);
		}
		else
		{
			LL_USART_TransmitData8(USART6, p_uart_info->tx_buf[p_uart_info->tx_index]);
			p_uart_info->tx_index++;
		}
	}
	//---------------------------------------------------------------------------
	LL_USART_ClearFlag_ORE(USART6);
  /* USER CODE END USART6_IRQn 1 */
}

/**
  * @brief This function handles UART7 global interrupt.
  */
void UART7_IRQHandler(void)
{
  /* USER CODE BEGIN UART7_IRQn 0 */
	unsigned short cc;
	uart_info_8bit_struct * p_uart_info;
	p_uart_info = &uart_info_8bit[7];
  /* USER CODE END UART7_IRQn 0 */
  /* USER CODE BEGIN UART7_IRQn 1 */
	/*
	if(LL_USART_IsActiveFlag_RXNE(UART7))
	{
		cc = LL_USART_ReceiveData8(UART7);
		
		if(cc == UART_HEAD)
		{
			p_uart_info->rx_index = 0;
		}
		else if(cc == UART_END)
		{
			p_uart_info->rx_len = p_uart_info->rx_index;
			p_uart_info->rx_complete = 1;
		}
		else
		{
			if(p_uart_info->rx_index < UART_RX_BUF_MAX)
			{
				p_uart_info->rx_buf[p_uart_info->rx_index] = cc;
				p_uart_info->rx_index++;
			}
		}
	}
	
	if(LL_USART_IsActiveFlag_IDLE(UART7))
	{
		LL_USART_ClearFlag_IDLE(UART7);
	}
	*/
	
	if(LL_USART_IsActiveFlag_RXNE(UART7))
	{
		cc = LL_USART_ReceiveData8(UART7);
		
		if(p_uart_info->rx_index < UART_RX_BUF_MAX)
		{
			p_uart_info->rx_buf[p_uart_info->rx_index] = cc;
			p_uart_info->rx_index++;
		}
	}
	
	if(LL_USART_IsActiveFlag_IDLE(UART7))
	{
		LL_USART_ClearFlag_IDLE(UART7);
		if(p_uart_info->rx_index)
		{
			p_uart_info->rx_len = p_uart_info->rx_index;
			p_uart_info->rx_index = 0;
			p_uart_info->rx_complete = 1;
		}
	}
	//--------------------------------------------------------------------------------------------------
	if(LL_USART_IsActiveFlag_TC(UART7))
	{
		LL_USART_ClearFlag_TC(UART7);
		if(p_uart_info->tx_index >= p_uart_info->tx_len)
		{
			LL_USART_DisableIT_TC(UART7);
			p_uart_info->tx_complete = 1;
		}
	}
	
	if(LL_USART_IsActiveFlag_TXFE(UART7))
	{
		if(p_uart_info->tx_index >= p_uart_info->tx_len)
		{
			LL_USART_DisableIT_TXFE(UART7);
		}
		else
		{
			LL_USART_TransmitData8(UART7, p_uart_info->tx_buf[p_uart_info->tx_index]);
			p_uart_info->tx_index++;
		}
	}
	//---------------------------------------------------------------------------
	LL_USART_ClearFlag_ORE(UART7);
  /* USER CODE END UART7_IRQn 1 */
}

/**
  * @brief This function handles LTDC global interrupt.
  */
void LTDC_IRQHandler(void)
{
  /* USER CODE BEGIN LTDC_IRQn 0 */

  /* USER CODE END LTDC_IRQn 0 */
  HAL_LTDC_IRQHandler(&hltdc);
  /* USER CODE BEGIN LTDC_IRQn 1 */

  /* USER CODE END LTDC_IRQn 1 */
}

/**
  * @brief This function handles USB On The Go FS global interrupt.
  */
void OTG_FS_IRQHandler(void)
{
  /* USER CODE BEGIN OTG_FS_IRQn 0 */

  /* USER CODE END OTG_FS_IRQn 0 */
  HAL_HCD_IRQHandler(&hhcd_USB_OTG_FS);
  /* USER CODE BEGIN OTG_FS_IRQn 1 */
	HAL_PCD_IRQHandler(&hpcd_USB_OTG_FS);
  /* USER CODE END OTG_FS_IRQn 1 */
}

/**
  * @brief This function handles LPUART1 global interrupt.
  */
void LPUART1_IRQHandler(void)
{
  /* USER CODE BEGIN LPUART1_IRQn 0 */
	unsigned short cc;
	uart_info_8bit_struct * p_uart_info;
	p_uart_info = &uart_info_8bit[0];
  /* USER CODE END LPUART1_IRQn 0 */
  /* USER CODE BEGIN LPUART1_IRQn 1 */
	test_rx_irq();
	
	//--------------------------------------------------------------------------------------------------
	if(LL_USART_IsActiveFlag_TC(LPUART1))
	{
		LL_USART_ClearFlag_TC(LPUART1);
		if(p_uart_info->tx_index >= p_uart_info->tx_len)
		{
			LL_USART_DisableIT_TC(LPUART1);
			p_uart_info->tx_complete = 1;
		}
	}
	
	if(LL_USART_IsActiveFlag_TXFE(LPUART1))
	{
		if(p_uart_info->tx_index >= p_uart_info->tx_len)
		{
			LL_USART_DisableIT_TXFE(LPUART1);
		}
		else
		{
			LL_USART_TransmitData8(LPUART1, p_uart_info->tx_buf[p_uart_info->tx_index]);
			p_uart_info->tx_index++;
		}
	}
	//---------------------------------------------------------------------------
	LL_USART_ClearFlag_ORE(LPUART1);
  /* USER CODE END LPUART1_IRQn 1 */
}

/* USER CODE BEGIN 1 */

/* USER CODE END 1 */
