- Support ARM Compiler6. Thx @ChenxuanZhao https://github.com/armink-rtt-pkgs/CmBacktrace/pull/4
- Support Chinese UTF-8. Thx @ChenxuanZhao https://github.com/armink-rtt-pkgs/CmBacktrace/pull/5
- Support Cortex-M33 Core. Thx @StackRyan https://github.com/armink-rtt-pkgs/CmBacktrace/pull/10
This commit is contained in:
armink
2021-02-03 16:42:03 +08:00
parent f1244876cd
commit f4c50b13be
9 changed files with 648 additions and 209 deletions
+60 -14
View File
@@ -36,31 +36,33 @@
/* library software version number */
#define CMB_SW_VERSION "1.4.0"
#define CMB_CPU_ARM_CORTEX_M0 0
#define CMB_CPU_ARM_CORTEX_M3 1
#define CMB_CPU_ARM_CORTEX_M4 2
#define CMB_CPU_ARM_CORTEX_M7 3
#define CMB_CPU_ARM_CORTEX_M0 0
#define CMB_CPU_ARM_CORTEX_M3 1
#define CMB_CPU_ARM_CORTEX_M4 2
#define CMB_CPU_ARM_CORTEX_M7 3
#define CMB_CPU_ARM_CORTEX_M33 4
#define CMB_OS_PLATFORM_RTT 0
#define CMB_OS_PLATFORM_UCOSII 1
#define CMB_OS_PLATFORM_UCOSIII 2
#define CMB_OS_PLATFORM_FREERTOS 3
#define CMB_OS_PLATFORM_RTT 0
#define CMB_OS_PLATFORM_UCOSII 1
#define CMB_OS_PLATFORM_UCOSIII 2
#define CMB_OS_PLATFORM_FREERTOS 3
#define CMB_PRINT_LANGUAGE_ENGLISH 0
#define CMB_PRINT_LANGUAGE_CHINESE 1
#define CMB_PRINT_LANGUAGE_ENGLISH 0
#define CMB_PRINT_LANGUAGE_CHINESE 1
#define CMB_PRINT_LANGUAGE_CHINESE_UTF8 2
/* name max length, default size: 32 */
#ifndef CMB_NAME_MAX
#define CMB_NAME_MAX 32
#define CMB_NAME_MAX 32
#endif
/* print information language, default is English */
#ifndef CMB_PRINT_LANGUAGE
#define CMB_PRINT_LANGUAGE CMB_PRINT_LANGUAGE_ENGLISH
#define CMB_PRINT_LANGUAGE CMB_PRINT_LANGUAGE_ENGLISH
#endif
#if defined(__CC_ARM)
#if defined(__CC_ARM) || defined(__CLANG_ARM)
/* C stack block name, default is STACK */
#ifndef CMB_CSTACK_BLOCK_NAME
#define CMB_CSTACK_BLOCK_NAME STACK
@@ -164,9 +166,15 @@ struct cmb_hard_fault_regs{
union {
unsigned int value;
struct {
#if (CMB_CPU_PLATFORM_TYPE == CMB_CPU_ARM_CORTEX_M33)
unsigned int IPSR : 9; // Interrupt Program Status register (IPSR)
unsigned int EPSR : 18; // Execution Program Status register (EPSR)
unsigned int APSR : 5; // Application Program Status register (APSR)
#else
unsigned int IPSR : 8; // Interrupt Program Status register (IPSR)
unsigned int EPSR : 19; // Execution Program Status register (EPSR)
unsigned int APSR : 5; // Application Program Status register (APSR)
#endif
} bits;
} psr; // Program status register.
} saved;
@@ -176,9 +184,19 @@ struct cmb_hard_fault_regs{
struct {
unsigned int MEMFAULTACT : 1; // Read as 1 if memory management fault is active
unsigned int BUSFAULTACT : 1; // Read as 1 if bus fault exception is active
#if (CMB_CPU_PLATFORM_TYPE == CMB_CPU_ARM_CORTEX_M33)
unsigned int HARDFAULTACT : 1; // Read as 1 if hardfault is active
#else
unsigned int UnusedBits1 : 1;
#endif
unsigned int USGFAULTACT : 1; // Read as 1 if usage fault exception is active
#if (CMB_CPU_PLATFORM_TYPE == CMB_CPU_ARM_CORTEX_M33)
unsigned int SECUREFAULTACT : 1; // Read as 1 if secure fault exception is active
unsigned int NMIACT : 1; // Read as 1 if NMI exception is active
unsigned int UnusedBits2 : 1;
#else
unsigned int UnusedBits2 : 3;
#endif
unsigned int SVCALLACT : 1; // Read as 1 if SVC exception is active
unsigned int MONITORACT : 1; // Read as 1 if debug monitor exception is active
unsigned int UnusedBits3 : 1;
@@ -191,6 +209,13 @@ struct cmb_hard_fault_regs{
unsigned int MEMFAULTENA : 1; // Memory management fault handler enable
unsigned int BUSFAULTENA : 1; // Bus fault handler enable
unsigned int USGFAULTENA : 1; // Usage fault handler enable
#if (CMB_CPU_PLATFORM_TYPE == CMB_CPU_ARM_CORTEX_M33)
unsigned int SECUREFAULTENA : 1; // Secure fault handler enable
unsigned int SECUREFAULTPENDED : 1; // Secure fault pended; Secure fault handler was started but was replaced by a higher-priority exception
unsigned int HARDFAULTPENDED : 1; // Hard fault pended; Hard fault handler was started but was replaced by a higher-priority exception
#else
// None
#endif
} bits;
} syshndctrl; // System Handler Control and State Register (0xE000ED24)
@@ -231,7 +256,12 @@ struct cmb_hard_fault_regs{
unsigned short INVSTATE : 1; // Attempts to switch to an invalid state (e.g., ARM)
unsigned short INVPC : 1; // Attempts to do an exception with a bad value in the EXC_RETURN number
unsigned short NOCP : 1; // Attempts to execute a coprocessor instruction
#if (CMB_CPU_PLATFORM_TYPE == CMB_CPU_ARM_CORTEX_M33)
unsigned short STKOF : 1; // Indicates a stack overflow error has occured
unsigned short UnusedBits : 3;
#else
unsigned short UnusedBits : 4;
#endif
unsigned short UNALIGNED : 1; // Indicates that an unaligned access fault has taken place
unsigned short DIVBYZERO0 : 1; // Indicates a divide by zero has taken place (can be set only if DIV_0_TRP is set)
} bits;
@@ -271,7 +301,7 @@ if (!(EXPR)) \
}
/* ELF(Executable and Linking Format) file extension name for each compiler */
#if defined(__CC_ARM)
#if defined(__CC_ARM) || defined(__CLANG_ARM)
#define CMB_ELF_FILE_EXTENSION_NAME ".axf"
#elif defined(__ICCARM__)
#define CMB_ELF_FILE_EXTENSION_NAME ".out"
@@ -325,6 +355,22 @@ if (!(EXPR)) \
mov r0, sp
bx lr
}
#elif defined(__CLANG_ARM)
__attribute__( (always_inline) ) static __inline uint32_t cmb_get_msp(void) {
uint32_t result;
__asm volatile ("mrs %0, msp" : "=r" (result) );
return (result);
}
__attribute__( (always_inline) ) static __inline uint32_t cmb_get_psp(void) {
uint32_t result;
__asm volatile ("mrs %0, psp" : "=r" (result) );
return (result);
}
__attribute__( (always_inline) ) static __inline uint32_t cmb_get_sp(void) {
uint32_t result;
__asm volatile ("mov %0, sp" : "=r" (result) );
return (result);
}
#elif defined(__ICCARM__)
/* IAR iccarm specific functions */
/* Close Raw Asm Code Warning */